This article details the things that must be considered when adding support for a new display. Specifically, two tasks must be performed:
- Configure the MCU pins connected to the display.
- Configure the TFT controller.
Note: The code for configuring pins and TFT-controller is a part of the hardware initialization done as part of board configuration in TouchGFX, so to support a different display, the board configuration must be updated to adhere to the new hardware specifications.
LCD Pin Configuration
The appropriate MCU pins must be configured to function as LCD interface pins. That includes the RGB data pins, control signals (
VSYNC, DE) and backlight control pin.
These are normally connected to a PWM-capable output which can initially be set to full duty cycle or used as a simple general purpose digital output to obtain maximum backlight intensity.
TFT controller initialization
Configuration of the TFT controller varies depending on platform hardware because peripheral registers and display timings vary across MCU families and displays. As such, this is a general description of the concepts involved in initializing TFT controllers for TouchGFX application, which can hopefully aid in the configuration of your concrete platform.
Note: We recommend that you take a look at the diagrams in Timing and TFT Controller Integration in order to understand the basic concepts of porches vs. active area and their effect on
A TFT controller usually needs to have the following parameters configured:
- Frame buffer address. Set this to the start address of the block of external memory you will want to use for frame buffers.
- Color format. This should match your hardware and be supported by TouchGFX. Please note that there is usually also a flag to control the color ordering for some display depths (BGR vs. RGB and LSB vs. MSB).
- Interrupts. These must not occur until TouchGFX is properly initialized, so leave them off initially. The MCU Component will configure these later.
- Clock source. Consult the display datasheet/manual for the acceptable pixel clock frequency range. You will normally want the pixel clock to run as fast as the display accepts.
- Back porches. These define the vertical and horizontal delays between VSYNC/HSYNC signals and actual data (the active area). Back porch values must normally be a specific number of pixel clocks for the image to appear at the correct position on the display. Consult the display datasheet for correct values. See Timing and TFT Controller Integration for more information about back porches and front porches.
- Front porches. These delays can be modified to obtain the desired VSYNC frequency. You should aim for front porch settings which yield a VSYNC approximately every 17-20ms.
- Arbitration priority. Not usually a setting of the TFT controller itself, but some MCUs allow configuring the access priority in case several bus masters wish to access e.g. the external memory simultaneously. It is important that the TFT controller has a high priority in this case, as starvation will lead to visible frame errors.
Troubleshooting: Should you experience flickering, try lowering the pixel clock.
Simple Display Test
With the TFT controller running, a simple color test can help verify the correctness of the configuration. Fill the entire frame buffer region with various values:
uint16_t black = 0x0; uint16_t white = 0xFFFF; uint16_t red = 0xF800; uint16_t green = 0x7E0; uint16_t blue = 0x1D;
24-bit displays (BGR):
black = 0x000000; white = 0xFFFFFF; red = 0x0000FF; green = 0x00FF00; blue = 0xFF0000;